Hsiang-Hui Chang,: search on Z-Library

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1

A Battery-Less, Implantable Neuro-Electronic Interface for Studying the Mechanisms of Deep Brain Stimulation in Rat Models

Lin, Yu-Po, Yeh, Chun-Yi, Huang, Pin-Yang, Wang, Zong-Ye, Cheng, Hsiang-Hui, Li, Yi-Ting, Chuang, Chi-Fen, Huang, Po-Chiun, Tang, Kea-Tiong, Ma, Hsi-Pin, Chang, Yen-Chung, Yeh, Shih-Rung, Chen, Hsin

Journal:

IEEE Transactions on Biomedical Circuits and Systems

Year:

2015

Language:

english

File:

PDF, 4.55 MB

english, 2015

2

[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - A wide-range and fixed latency of one clock cycle delay-locked loop

Hsiang-Hui Chang,, Jyh-Woei Lin,, Shen-Iuan Liu,

Year:

2002

Language:

english

File:

PDF, 374 KB

english, 2002

3

A Digital Intensive Fractional-N PLL and All-Digital Self-Calibration Schemes

Ping-Ying Wang, Zhan, J.-H.C., Hsiang-Hui Chang, Chang, H.-M.S.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 2.27 MB

english, 2009

4

Engineering Cyanobacteria with Enhanced Growth in Simulated Flue Gases for High-Yield Bioethanol Production

Chou, Hsiang-Hui, Su, Hsiang-Yen, Chow, Te-Jin, Lee, Tse-Min, Cheng, Wen-Hsi, Chang, Jo-Shu, Chen, Hsien-Jung

Journal:

Biochemical Engineering Journal

Year:

2020

File:

PDF, 3.25 MB

2020

5

Improvement of outdoor culture efficiency of cyanobacteria by over-expression of stress tolerance genes and its implication as bio-refinery feedstock

Su, Hsiang-Yen, Chou, Hsiang-Hui, Chow, Te-Jin, Lee, Tse-Min, Chang, Jo-Shu, Huang, Wen-Lii, Chen, Hsien-Jung

Journal:

Bioresource Technology

Year:

2017

Language:

english

File:

PDF, 4.65 MB

english, 2017

6

[IEEE ESSCIRC 2008 - 34th European Solid-State Circuits Conference - Edinburgh, UK (2008.09.15-2008.09.19)] ESSCIRC 2008 - 34th European Solid-State Circuits Conference - A fractional spur reduction technique for RF TDC-based all digital PLLs

Ping-Ying Wang,, Hsiang-Hui Chang,, Jing-Hong Conan Zhan,

Year:

2008

Language:

english

File:

PDF, 504 KB

english, 2008

7

[IEEE 2008 IEEE Custom Integrated Circuits Conference - CICC 2008 - San Jose, CA, USA (2008.09.21-2008.09.24)] 2008 IEEE Custom Integrated Circuits Conference - An analog enhanced all digtial RF fractional-N PLL with self-calibrated capability

Ping-Ying Wang,, Jing-Hong Conan Zhan,, Hsiang-Hui Chang,, Bing-Yu Hsieh,

Year:

2008

Language:

english

File:

PDF, 377 KB

english, 2008

8

[IEEE 2012 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - Montreal, QC, Canada (2012.06.17-2012.06.19)] 2012 IEEE Radio Frequency Integrated Circuits Symposium - A 65nm GSM/GPRS/EDGE SoC with Integrated BT/FM

Chiu, Chinq-Shiun, Chang, Hsiang-Hui, Wu, Tzung-Han, Chen, Shin-Fu, Chin, Chieh-Chuan, Hong, Wei-Kai, Wong, Sheng Jau, Lai, Li-Shin, Wang, Chi-Hsueh, Yang, Song-Yu, Lin, Ta-Hsin, Chen, Jhy-Rong, Tsai,

Year:

2012

Language:

english

File:

PDF, 395 KB

english, 2012

9

[IEEE IEEE International Solid-State Circuits Conference - San Francisco, CA, USA (9-13 Feb. 2003)] 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. - A low-jitter and precise multiphase delay-locked loop using shifted averaging VCDL

Hsiang-Hui Chang,, Chih-Hao Sun,, Shen-Iuan Liu,

Year:

2003

Language:

english

File:

PDF, 582 KB

english, 2003

10

[IEEE 2014 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - Tampa, FL, USA (2014.6.1-2014.6.3)] 2014 IEEE Radio Frequency Integrated Circuits Symposium - A HSPA+/WCDMA/EDGE 40nm Modem SoC with embedded RF transceiver supporting RX diversity

Strange, Jon, Chang, Hsiang-Hui, Muller, Paul, Ali-Ahmad, Walid, Beghein, Christophe, Ben Abdeljelil, Fahd, Lee, Wen-Chang, Chiu, Charles, Sin, Tze Yee, Lin, Ta-Hsin, Ivory, David, Shih, Hao-Tang, Bea

Year:

2014

Language:

english

File:

PDF, 280 KB

english, 2014

11

[Japan Soc. Appl. Phys 2003 Symposium on VLSI Circuits. Digest of Technical Papers - Kyoto, Japan (12-14 June 2003)] 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408) - Low jitter Butterworth delay-locked loops

Hsiang-Hui Chang,, Chih-Hao Sun,, Shen-Iuan Liu,

Year:

2003

Language:

english

File:

PDF, 283 KB

english, 2003

12

A SAW-Less GSM/GPRS/EDGE Receiver Embedded in 65-nm SoC

Chi-Yao Yu, Lu, I.S., Yen-Horng Chen, Lan-Chou Cho, Sun, C.E., Chih-Chun Tang, Hsiang-Hui Chang, Wen-Chang Lee, Sheng-Jui Huang, Tzung-Han Wu, Chinq-Shiun Chiu, Chien, G.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2011

Language:

english

File:

PDF, 2.80 MB

english, 2011

13

A fast locking and low jitter delay-locked loop using DHDL

Hsiang-Hui Chang, Jyh-Woei Lin, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2003

Language:

english

File:

PDF, 462 KB

english, 2003

14

[IEEE 2009 IEEE Asian Solid-State Circuits Conference (A-SSCC) - Taipei, Taiwan (2009.11.16-2009.11.18)] 2009 IEEE Asian Solid-State Circuits Conference - A 439K gates/10.9KB SRAM/2–328 mW dual mode video decoder supporting temporal/spatial scalable video

Chien, Cheng-An, Yang, Yao-Chang, Chang, Hsiu-Cheng, Guo, Jiun-In, Chen, Jia-Wei, Wang, Jinn-Shan, Wang, Chin-Hsien, Huang, Hsiang-Hui, Cheng, Ching-Hwa

Year:

2009

Language:

english

File:

PDF, 1.00 MB

english, 2009

15

A Low-Current Digitally Predistorted Direct-Conversion Transmitter With 25% Duty-Cycle Passive Mixer

Collados, Manel, Zhang, HongLi, Tenbroek, Bernard, Chang, Hsiang-Hui

Journal:

IEEE Transactions on Microwave Theory and Techniques

Year:

2014

Language:

english

File:

PDF, 1.55 MB

english, 2014

16

[IEEE ESSCIRC 2004 - 29th European Solid-State Circuits Conference - Estoril, Portugal (16-18 Sept. 2003)] ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705) - A shifted-averaging VCO with precise multiphase outputs and low jitter operation

Hsiang-Hui Chang,, Shang-Ping Chen,, Shen-Iuan Liu,

Year:

2003

Language:

english

File:

PDF, 243 KB

english, 2003

17

Using recombinant cyanobacterium (Synechococcus elongatus) with increased carbohydrate productivity as feedstock for bioethanol production via separate hydrolysis and fermentation process

Chow, Te-Jin, Su, Hsiang-Yen, Tsai, Tsung-Yu, Chou, Hsiang-Hui, Lee, Tse-Min, Chang, Jo-Shu

Journal:

Bioresource Technology

Year:

2015

Language:

english

File:

PDF, 979 KB

english, 2015

18

[IEEE 2002 IEEE Asia-Pacific Conference on ASIC. - Taipei, Taiwan (6-8 Aug. 2002)] Proceedings. IEEE Asia-Pacific Conference on ASIC, - A 0.8 V switched-opamp bandpass ΔΣ modulator using a two-path architecture

Hsiang-Hui Chang,, Shang-Ping Chen,, Kuang-Wei Cheng,, Shen-Iuan Liu,

Year:

2002

Language:

english

File:

PDF, 271 KB

english, 2002

19

A wide-range delay-locked loop with a fixed latency of one clock cycle

Hsiang-Hui Chang, Jyh-Woei Lin, Ching-Yuan Yang, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2002

Language:

english

File:

PDF, 315 KB

english, 2002

20

A spread-spectrum clock generator with triangular modulation

Hsiang-Hui Chang, I-Hui Hua, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2003

Language:

english

File:

PDF, 653 KB

english, 2003

21

[IEEE 2011 IEEE Asian Solid-State Circuits Conference (A-SSCC) - Jeju, South Korea (2011.11.14-2011.11.16)] IEEE Asian Solid-State Circuits Conference 2011 - A 1.22/6.7 ppm/°C VCO with frequency-drifting compensator in 60 nm CMOS

Cho, Lan-Chou, Chang, Hsiang-Hui, Marques, Augusto, Yang, Albert, Chiu, C S, Dehng, G K

Year:

2011

Language:

english

File:

PDF, 1.02 MB

english, 2011

22

A 65-nm GSM/GPRS/EDGE SoC With Integrated BT/FM

Wu, Tzung-Han, Chang, Hsiang-Hui, Chen, Shin-Fu, Chiu, Chinq-Shiun, Lai, Li-Shin, Wang, Chi-Hsueh, Yang,, Lin, Ta-Hsin, Chen, Jhy-Rong, Tsai, Hung-Chieh, Yu, Chi-Yao, Su, Sheng-Yuan, Yu, Tai-Yuan, Ch

Journal:

IEEE Journal of Solid-State Circuits

Year:

2013

Language:

english

File:

PDF, 3.36 MB

english, 2013

23

[IEEE 2006 IEEE Asian Solid-State Circuits Conference - Hangzhou, China (2006.11.13-2006.11.15)] 2006 IEEE Asian Solid-State Circuits Conference - A 10-mA Current and 1.1-μV Sensitivity Single-Chip FM Radio Receiver

Yeh, Vincent, Huang, Chris, Fu, Chia-Huang, Chen, Chieh-Hung, Lee, Tsorng-Lin, Chang, Hsiang-Hui, Lin, Tsung-Yao

Year:

2006

Language:

english

File:

PDF, 4.44 MB

english, 2006

24

[IEEE 2008 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - Atlanta, GA, USA (2008.06.17-2008.04.17)] 2008 IEEE Radio Frequency Integrated Circuits Symposium - A transfer-curve-folded DCO in 0.13μm CMOS

Jing-Hong Conan Zhan,, Hsiang-Hui Chang,, Ping-Ying Wang,

Year:

2008

Language:

english

File:

PDF, 157 KB

english, 2008

25

Efficacy of recombinant protein vaccines for protection against Nocardia seriolae infection in the largemouth bass Micropterus salmoides

Ho, Ping-Yueh, Chen, Yao-Chung, Maekawa, Shun, Hu, Hsiang-Hui, Tsai, An-Wei, Chang, Yung-Fu, Wang, Pei-Chi, Chen, Shih-Chu

Journal:

Fish & Shellfish Immunology

Year:

2018

Language:

english

File:

PDF, 3.56 MB

english, 2018

26

A wide-range and fast-locking all-digital cycle-controlled delay-locked loop

Hsiang-Hui Chang, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2005

Language:

english

File:

PDF, 1.09 MB

english, 2005

27

Use of Reverse Transcription Loop-Mediated Isothermal Amplification for the Detection of Zucchini yellow mosaic virus

Kuan, Cheng-Ping, Deng, Ting-Chin, Huang, Hung-Chang, Chi, Hsiang-Hui, Lu, Yi-Lin

Journal:

Journal of Phytopathology

Year:

2014

Language:

english

File:

PDF, 557 KB

english, 2014

28

A 0.7-2-GHz self-calibrated multiphase delay-locked loop

Hsiang-Hui Chang, Jung-Yu Chang, Chun-Yi Kuo, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2006

Language:

english

File:

PDF, 2.35 MB

english, 2006

29

[IEEE IEEE 2002 Custom Integrated Circuits Conference - Orlando, FL, USA (12-15 May 2002)] Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) - A 6 MHz-130 MHz DLL with a fixed latency of one clock cycle delay

Hsiang-Hui Chang,, Jyh-Woei Lin,, Shen-Iuan Liu,

Year:

2002

Language:

english

File:

PDF, 464 KB

english, 2002

30

[IEEE 2008 International Solid-State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2008.02.3-2008.02.7)] 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers - A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE

Chang, Hsiang-Hui, Wang, Ping-Ying, Zhan, Jing-Hong Conan, Hsieh, Bing-Yu

Year:

2008

Language:

english

File:

PDF, 1.75 MB

english, 2008

31

[IEEE 2005 IEEE Asian Solid-State Circuits Conference - Hsinchu, Taiwan (2005.11.1-2005.11.1)] 2005 IEEE Asian Solid-State Circuits Conference - A Calibrated Pulse Generator for Impuljse-radio UWB Applications

Liang, Che-fu, Liu, Shih-tsai, Chang, Hsiang-hui, Liu, Shen-iuan

Year:

2006

Language:

english

File:

PDF, 474 KB

english, 2006

32

[IEEE 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2008.04.23-2008.04.25)] 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - A 1.6–880MHz synthesizable ADPLL in 0.13um CMOS

Hsiang-Hui Chang,, Shang-Ming Lee,, Chao-Wen Chou,, Yu-Tung Chang,, Yi-Li Cheng,

Year:

2008

Language:

english

File:

PDF, 1.11 MB

english, 2008

33

[IEEE 2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - Seattle, WA, USA (2013.06.2-2013.06.4)] 2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - A low-current digitally predistorted 3G-4G transmitter in 40nm CMOS

Collados, Manel, Zhang, Hongli, Tenbroek, Bernard, Chang, Hsiang-Hui

Year:

2013

Language:

english

File:

PDF, 846 KB

english, 2013

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